[PATCH] D156767: [AArch64] [BranchRelaxation] Optimize for hot code size in AArch64 branch relaxation

[Mingming Liu via Phabricator via llvm-commits]

mingmingl added inline comments.


================
Comment at: llvm/test/CodeGen/AArch64/branch-relax-cross-section.mir:181-192
+  ; CHECK:       bb.4.cold (bbsections Cold):
+  ; CHECK-NEXT:    successors: %bb.2(0x80000000)
+  ; CHECK-NEXT:    {{ $}}
+  ; CHECK-NEXT:    early-clobber $sp, $x16 = LDRXpost $sp, 16
+  ; CHECK-NEXT:    {{ $}}
+  ; CHECK-NEXT:  bb.2.cold (bbsections Cold):
+  ; CHECK-NEXT:    successors: %bb.5(0x80000000)
----------------
I should have missed something here.. Where does `bb.4` and `bb.5` come from for 'x16_used_cold_to_hot'? Testing the IR (https://gcc.godbolt.org/z/esjchq3PK) gives 3 blocks.. 

Relatedly, I think submitting test cases as NFC and rebase on top of that should display the diff clearer.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D156767/new/

https://reviews.llvm.org/D156767