[PATCH] D155995: [AMDGPU]: Allow combining into v_dot4
Jeffrey Byrnes via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 22 12:45:33 PDT 2023
jrbyrnes added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:12364-12365
+ };
+ auto Match = std::find_if(Srcs.begin(), Srcs.end(), MatchesSecond);
+ if (Match != Srcs.end()) {
+ Match->second = addPermMasks(SecondMask, Match->second);
----------------
arsenm wrote:
> is_contained
We use the found value here
================
Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:12493-12496
+ (LHS.getOpcode() == AMDGPUISD::MUL_I24 ||
+ LHS.getOpcode() == AMDGPUISD::MUL_U24 || LHS.getOpcode() == ISD::MUL)
+ ? 0
+ : 1;
----------------
arsenm wrote:
> Don't understand what you are doing with this opcode to index check
It is a convenience which allows getting the mul operand without having to do operand checks every time.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D155995/new/
https://reviews.llvm.org/D155995
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