[PATCH] D158053: [Legalizer] Expand fmaximum and fminimum

Tue Aug 22 12:02:29 PDT 2023

arsenm added a comment.

In D158053#4605852 <https://reviews.llvm.org/D158053#4605852>, @qiucf wrote:

> In D158053#4598440 <https://reviews.llvm.org/D158053#4598440>, @arsenm wrote:
>
>> I think we should either define the existing FMINNUM_IEEE/FMAXNUM_IEEE to have the correct IEEE 2019 signed zero ordering (I can't name a target that doesn't have this behavior), or we have to add a pair of DAG nodes that do
>
> Some targets have instructions legal for `fminnum_ieee`. It's better to add new one.

I thought AMDGPU was the only one using it, but I see PPC and Loongarch have started. AMDGPU definitely has the correct signed zero behavior, so do the other 2?

Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D158053/new/

https://reviews.llvm.org/D158053