[PATCH] D158364: [DAG] SimplifyDemandedBits - if we're only demanding the signbits, a SMIN/SMAX node can be simplified to a OR/AND node respectively.
Noah Goldstein via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 22 09:51:49 PDT 2023
goldstein.w.n added a comment.
Can you parameterize the proofs with `C1` and `C2` instead of just `3` and `1` to make them complete?
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rG LLVM Github Monorepo
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https://reviews.llvm.org/D158364/new/
https://reviews.llvm.org/D158364
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