[PATCH] D158396: [RISCV] Add missed fcsr spill and restore in interrupt

Yunze Zhu(Thead) via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 21 01:22:05 PDT 2023


Yunzezhu created this revision.
Yunzezhu added reviewers: craig.topper, asb, kito-cheng.
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According to gcc, fcsr should be spill and restore in interrupt, which is missed in llvm.
This patch added fcsr spill and restore when has interrupt and standard extension f on.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D158396

Files:
  llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
  llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h
  llvm/test/CodeGen/RISCV/interrupt-attr-nocall.ll
  llvm/test/CodeGen/RISCV/interrupt-attr.ll

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