[PATCH] D157510: [RISCV] Implement intrinsics for XCVbitmanip extension in CV32E40P

[Funan Zeng via Phabricator via llvm-commits]

melonedo updated this revision to Diff 551829.
melonedo marked 3 inline comments as done.
melonedo added a comment.
Herald added a subscriber: sunshaoce.

Remove CORE-V specific intrisics for cv.ff1/fl1/cnt/ror


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D157510/new/

https://reviews.llvm.org/D157510

Files:
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/include/llvm/IR/IntrinsicsRISCVXCV.td
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
  llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
  llvm/test/CodeGen/RISCV/xcvbitmanip.ll

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