[PATCH] D158359: [AMDGPU] Adjust swdev373493.ll to remove reduced switch undef instruction

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/test/CodeGen/AMDGPU/swdev373493.ll:6
 
-define hidden fastcc void @bar(i32 %arg, ptr %arg1, ptr %arg2, ptr %arg3, ptr %arg4, ptr %arg5, ptr %arg6) unnamed_addr align 2 {
+define amdgpu_gfx void @bar(i32 %arg, ptr %arg1, ptr %arg2, ptr %arg3, ptr %arg4, ptr %arg5, ptr %arg6, i32 inreg %arg7) unnamed_addr align 2 {
 ; CHECK-LABEL: bar:
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Should keep the hidden 


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Comment at: llvm/test/CodeGen/AMDGPU/swdev373493.ll:17
+; CHECK-NEXT:    v_writelane_b32 v40, s5, 1
+; CHECK-NEXT:    v_writelane_b32 v40, s6, 2
+; CHECK-NEXT:    v_writelane_b32 v40, s7, 3
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All this new spilling is suspicious. Does it go away if you use a load from constant global variable instead of the calling convention change?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D158359/new/

https://reviews.llvm.org/D158359