[PATCH] D158272: [AArch64] [GlobalISel] Fix clobbered callee saved registers with win64 varargs

[Martin Storsjö via Phabricator via llvm-commits]

mstorsjo added inline comments.


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Comment at: llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp:567
                                      -static_cast<int>(GPRSaveSize), false);
+      if (GPRSaveSize & 15)
+        // The extra size here, if triggered, will always be 8.
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tschuett wrote:
> Is this:
> `if (GPRSaveSize & 15 > 0)` or
> `if (GPRSaveSize & 15 == 15)` ?
It's `if ((GPRSaveSize & 15) > 0)` - or practically `if ((GPRSaveSize & 15) == 8)` as `GPRSaveSize` is in increments of 8. It's essentially checking whether `GPRArgRegs.size() - FirstVariadicGPR` is even or odd.

This is kept very similar to https://github.com/llvm/llvm-project/blob/llvmorg-17.0.0-rc2/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp#L6699-L6706.


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Comment at: llvm/test/CodeGen/AArch64/win64_vararg2.ll:72-73
+; GISEL-NEXT:    .seh_endproc
+  %4 = alloca %"struct.std::__1::integral_constant", align 1
+  %5 = alloca %"struct.std::__1::integral_constant", align 1
+  %6 = alloca i32, align 4
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arsenm wrote:
> Use named values
Ok, I can change it that way.

FWIW, this was just the pretty much unreduced output from Clang. We've got a bunch of preexisting similar hand-reduced IR cases in `win64_vararg.ll`, but all of those make globalisel bail out, so I wanted to have a case that globalisel actually does accept.


Repository:
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  https://reviews.llvm.org/D158272/new/

https://reviews.llvm.org/D158272