[PATCH] D158272: [AArch64] [GlobalISel] Fix clobbered callee saved registers with win64 varargs

[Thorsten via Phabricator via llvm-commits]

tschuett added inline comments.


================
Comment at: llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp:567
                                      -static_cast<int>(GPRSaveSize), false);
+      if (GPRSaveSize & 15)
+        // The extra size here, if triggered, will always be 8.
----------------
Is this:
`if (GPRSaveSize & 15 > 0)` or
`if (GPRSaveSize & 15 == 15)` ?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D158272/new/

https://reviews.llvm.org/D158272