[PATCH] D158256: [RISCV] Fix assertion failure when zcmp extension is enabled.

Jessica Clarke via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Aug 18 01:05:00 PDT 2023


jrtc27 requested changes to this revision.
jrtc27 added inline comments.
This revision now requires changes to proceed.


================
Comment at: llvm/test/CodeGen/RISCV/prolog-epilog-crash.mir:2
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
+# Requires: asserts
+# RUN: llc -mtriple=riscv32 -mattr=+zcmp -target-abi ilp32  -run-pass=prologepilog\
----------------
REQUIRES


================
Comment at: llvm/test/CodeGen/RISCV/prolog-epilog-crash.mir:3
+# Requires: asserts
+# RUN: llc -mtriple=riscv32 -mattr=+zcmp -target-abi ilp32  -run-pass=prologepilog\
+# RUN: -simplify-mir -verify-machineinstrs -o - %s | FileCheck %s -check-prefixes=RV32IPE
----------------



================
Comment at: llvm/test/CodeGen/RISCV/prolog-epilog-crash.mir:4
+# RUN: llc -mtriple=riscv32 -mattr=+zcmp -target-abi ilp32  -run-pass=prologepilog\
+# RUN: -simplify-mir -verify-machineinstrs -o - %s | FileCheck %s -check-prefixes=RV32IPE
+
----------------
Don't need a custom CHECK prefix when there's just one in the whole file (and if you only have one for that FileCheck invocation you should use --check-prefix). Besides, what's IPE?..


================
Comment at: llvm/test/CodeGen/RISCV/prolog-epilog-crash.mir:7
+--- |
+  define hidden void @f(fp128 %a) local_unnamed_addr #0 {
+  entry:
----------------
Is the IR actually needed?


================
Comment at: llvm/test/CodeGen/RISCV/prolog-epilog-crash.mir:35
+---
+name:            f
+alignment:       2
----------------
If you're going to call it `f` then the test needs a comment for what's being tested here


Repository:
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  https://reviews.llvm.org/D158256/new/

https://reviews.llvm.org/D158256



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