[PATCH] D157679: [AArch64][GISel] Extend lowering for fp round intrinsics.

[Dave Green via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGcf65afbf93a8: [AArch64][GISel] Extend lowering for fp round intrinsics. (authored by dmgreen).

Changed prior to commit:
  https://reviews.llvm.org/D157679?vs=549259&id=551146#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D157679/new/

https://reviews.llvm.org/D157679

Files:
  llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
  llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
  llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
  llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
  llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-ceil.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-frint.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-intrinsic-round.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-intrinsic-roundeven.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-intrinsic-trunc.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-nearbyint.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
  llvm/test/CodeGen/AArch64/fcvt.ll

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