[llvm] 6f1d9fb - [X86] Add some i128 argument passing tests (NFC)

[Nikita Popov via llvm-commits]

Author: Nikita Popov
Date: 2023-08-17T12:00:37+02:00
New Revision: 6f1d9fb987273067ded01cb7607d50e517746658

URL: https://github.com/llvm/llvm-project/commit/6f1d9fb987273067ded01cb7607d50e517746658
DIFF: https://github.com/llvm/llvm-project/commit/6f1d9fb987273067ded01cb7607d50e517746658.diff

LOG: [X86] Add some i128 argument passing tests (NFC)

Added: 
    llvm/test/CodeGen/X86/i128-abi.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/i128-abi.ll b/llvm/test/CodeGen/X86/i128-abi.ll
new file mode 100644
index 00000000000000..1d1df9d592d72b
--- /dev/null
+++ b/llvm/test/CodeGen/X86/i128-abi.ll
@@ -0,0 +1,85 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp --version 2
+; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+
+define i128 @in_reg(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i128 %a4) {
+; CHECK-LABEL: in_reg:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movq %r9, %rdx
+; CHECK-NEXT:    movq %r8, %rax
+; CHECK-NEXT:    retq
+  ret i128 %a4
+}
+
+define i128 @on_stack(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i128 %a5) {
+; CHECK-LABEL: on_stack:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movq %r9, %rax
+; CHECK-NEXT:    movq 8(%rsp), %rdx
+; CHECK-NEXT:    retq
+  ret i128 %a5
+}
+
+define i64 @trailing_arg_on_stack(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i128 %a5, i64 %a6) {
+; CHECK-LABEL: trailing_arg_on_stack:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movq 16(%rsp), %rax
+; CHECK-NEXT:    retq
+  ret i64 %a6
+}
+
+define void @call_in_reg(i128 %x) nounwind {
+; CHECK-LABEL: call_in_reg:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    pushq %rax
+; CHECK-NEXT:    movq %rsi, %r9
+; CHECK-NEXT:    movq %rdi, %r8
+; CHECK-NEXT:    movl $1, %esi
+; CHECK-NEXT:    movl $2, %edx
+; CHECK-NEXT:    movl $3, %ecx
+; CHECK-NEXT:    xorl %edi, %edi
+; CHECK-NEXT:    callq in_reg at PLT
+; CHECK-NEXT:    popq %rax
+; CHECK-NEXT:    retq
+  call i128 @in_reg(i64 0, i64 1, i64 2, i64 3, i128 %x)
+  ret void
+}
+
+define void @call_on_stack(i128 %x) nounwind {
+; CHECK-LABEL: call_on_stack:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    pushq %rax
+; CHECK-NEXT:    movq %rdi, %r9
+; CHECK-NEXT:    movq %rsi, (%rsp)
+; CHECK-NEXT:    movl $1, %esi
+; CHECK-NEXT:    movl $2, %edx
+; CHECK-NEXT:    movl $3, %ecx
+; CHECK-NEXT:    movl $4, %r8d
+; CHECK-NEXT:    xorl %edi, %edi
+; CHECK-NEXT:    callq on_stack at PLT
+; CHECK-NEXT:    popq %rax
+; CHECK-NEXT:    retq
+  call i128 @on_stack(i64 0, i64 1, i64 2, i64 3, i64 4, i128 %x)
+  ret void
+}
+
+define void @call_trailing_arg_on_stack(i128 %x, i64 %y) nounwind {
+; CHECK-LABEL: call_trailing_arg_on_stack:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    pushq %rax
+; CHECK-NEXT:    movq %rdx, %rax
+; CHECK-NEXT:    movq %rsi, %r10
+; CHECK-NEXT:    movq %rdi, %r9
+; CHECK-NEXT:    movl $1, %esi
+; CHECK-NEXT:    movl $2, %edx
+; CHECK-NEXT:    movl $3, %ecx
+; CHECK-NEXT:    movl $4, %r8d
+; CHECK-NEXT:    xorl %edi, %edi
+; CHECK-NEXT:    pushq %rax
+; CHECK-NEXT:    pushq %r10
+; CHECK-NEXT:    callq trailing_arg_on_stack at PLT
+; CHECK-NEXT:    addq $16, %rsp
+; CHECK-NEXT:    popq %rax
+; CHECK-NEXT:    retq
+  call i128 @trailing_arg_on_stack(i64 0, i64 1, i64 2, i64 3, i64 4, i128 %x, i64 %y)
+  ret void
+}