[PATCH] D158062: [RISCV] Teach RISCVMergeBaseOffset to handle inline asm
Wang Pengcheng via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 17 00:20:41 PDT 2023
wangpc updated this revision to Diff 551025.
wangpc added a comment.
- Add `INLINEASM_BR`.
- Use changeToXXX to update operands instead of creating new MI.
- Record indexes of each inline asm MI.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D158062/new/
https://reviews.llvm.org/D158062
Files:
llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
llvm/test/CodeGen/RISCV/inline-asm-mem-constraint.ll
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D158062.551025.patch
Type: text/x-patch
Size: 25659 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230817/da9dc56d/attachment.bin>
More information about the llvm-commits
mailing list