[PATCH] D158086: [RISCV] Check floating point vector instruction with SEW=64 is valid when vsetvl insertion

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp:332
+                           const MachineRegisterInfo *MRI,
+                           bool hasVInstructionsF64) {
   // Warning: This function has to work on both the lowered (i.e. post
----------------
Capitalize variable name


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  https://reviews.llvm.org/D158086/new/

https://reviews.llvm.org/D158086