[PATCH] D158086: [RISCV] Check floating point vector instruction with SEW=64 is valid when vsetvl insertion

[Kito Cheng via Phabricator via llvm-commits]

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Scalar move and splat instruction are only demand the SEW is greater than
its own needs, but floating point vector with SEW=64 is not alwaws valid even
SEW=64 is valid, because we have a special configuration: zve64f.

So we need to check floating point vector instruction with SEW=64 is
valid when compute demand of floating point scalar move and splat
instruction.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D158086

Files:
  llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
  llvm/test/CodeGen/RISCV/rvv/vsetvli-valid-elen-fp.ll

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