[PATCH] D156538: [AArch64] Try to combine FMUL with FDIV
Dave Green via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 15 01:35:58 PDT 2023
dmgreen accepted this revision.
dmgreen added a comment.
This revision is now accepted and ready to land.
I like it, the new patterns look good to me. LGTM
================
Comment at: llvm/lib/Target/AArch64/AArch64InstrFormats.td:5041
def SXSri: BaseIntegerToFP<isUnsigned, GPR64, FPR32, fixedpoint_f32_i64, asm,
[(set FPR32:$Rd,
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Should these be recip too? I'm not sure they need to be, but it might be better for them to be consistent.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D156538/new/
https://reviews.llvm.org/D156538
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