[llvm] 3f82109 - [AArch64] Add FeatureFuseAdrpAdd for NeoverseV2
David Green via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 14 09:21:29 PDT 2023
Author: David Green
Date: 2023-08-14T17:21:25+01:00
New Revision: 3f8210921ea5976866131c36e2053521bfb2bcb7
URL: https://github.com/llvm/llvm-project/commit/3f8210921ea5976866131c36e2053521bfb2bcb7
DIFF: https://github.com/llvm/llvm-project/commit/3f8210921ea5976866131c36e2053521bfb2bcb7.diff
LOG: [AArch64] Add FeatureFuseAdrpAdd for NeoverseV2
As in all the other cpus from D134521, this adds FeatureFuseAdrpAdd to
NeoverseV2 to allow more linker relaxations.
Added:
Modified:
llvm/lib/Target/AArch64/AArch64.td
llvm/test/CodeGen/AArch64/misched-fusion-addadrp.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/AArch64/AArch64.td b/llvm/lib/Target/AArch64/AArch64.td
index 8f50af4b71fd9a..6e327b83e4e639 100644
--- a/llvm/lib/Target/AArch64/AArch64.td
+++ b/llvm/lib/Target/AArch64/AArch64.td
@@ -1146,6 +1146,7 @@ def TuneNeoverseV1 : SubtargetFeature<"neoversev1", "ARMProcFamily", "NeoverseV1
def TuneNeoverseV2 : SubtargetFeature<"neoversev2", "ARMProcFamily", "NeoverseV2",
"Neoverse V2 ARM processors", [
FeatureFuseAES,
+ FeatureFuseAdrpAdd,
FeatureLSLFast,
FeaturePostRAScheduler,
FeatureEnableSelectOptimize,
diff --git a/llvm/test/CodeGen/AArch64/misched-fusion-addadrp.ll b/llvm/test/CodeGen/AArch64/misched-fusion-addadrp.ll
index 1dc594ba878ea4..cddcd4653bc541 100644
--- a/llvm/test/CodeGen/AArch64/misched-fusion-addadrp.ll
+++ b/llvm/test/CodeGen/AArch64/misched-fusion-addadrp.ll
@@ -12,6 +12,7 @@
; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=neoverse-n1 | FileCheck %s
; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=neoverse-v1 | FileCheck %s
; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=neoverse-n2 | FileCheck %s
+; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=neoverse-v2 | FileCheck %s
@g = common local_unnamed_addr global ptr null, align 8
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