[PATCH] D157847: [RISCV] Fix assertion when passing f64 vectors via integer registers

[Alex Bradbury via Phabricator via llvm-commits]

asb accepted this revision.
asb added a comment.
This revision is now accepted and ready to land.

LGTM (thanks!) with a minor modification: please extend the test case so the argument is actually accessed (by adding a new function or otherwise).

e.g. `define <2 x double> @v2f64(<2 x double> %x, <2 x double> %y) {` and ` %1 = fadd <2 x double> %x, %y; ret <2 x double> %1`

Such a test also demonstrates that atrociously poor code is generated in that case (copying arguments to and from the stack unnecessarily). It does seem to be correct though. I suspect more attention is needed for zdinx code quality.

One point to note is that if whatever frontend that generated this code is aiming to comply with the standard calling convention, it should be passing that vector in memory (as Clang does).


Repository:
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https://reviews.llvm.org/D157847