[PATCH] D157510: [RISCV] Implement intrinsics for XCVbitmanip extension in CV32E40P
Funan Zeng via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Aug 13 20:58:42 PDT 2023
melonedo marked an inline comment as done.
melonedo added inline comments.
================
Comment at: llvm/include/llvm/IR/IntrinsicsRISCVXCV.td:38
+
+ def int_riscv_cv_bitmanip_bitrev
+ : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
----------------
melonedo wrote:
> craig.topper wrote:
> > Can we use llvm.bitreverse?
> cv.bitreverse is a generalization of llvm.bitreverse, which allows specifying number of higher bits to be ignored and number of bits grouped togather. For example, cv.bitreverse t0, t0, 23, 2 can transform octal 001 010 011 to 01 010 001.
...octal 001 010 011 to 011 010 001.
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https://reviews.llvm.org/D157510/new/
https://reviews.llvm.org/D157510
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