[PATCH] D157511: GlobalISel: Add constant fold combine for zext/sext/anyext

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added reviewers: paquette, aemerson, Pierre-vh, Petar.Avramovic, mbrkusanin, dsanders.
Herald added subscribers: kerbowa, hiraditya, jvesely.
Herald added a project: All.
arsenm requested review of this revision.
Herald added a subscriber: wdng.
Herald added a project: LLVM.

Could use more work for vectors.


https://reviews.llvm.org/D157511

Files:
  llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
  llvm/include/llvm/CodeGen/GlobalISel/Utils.h
  llvm/include/llvm/Target/GlobalISel/Combine.td
  llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
  llvm/lib/CodeGen/GlobalISel/Utils.cpp
  llvm/lib/Target/AArch64/AArch64Combine.td
  llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll
  llvm/test/CodeGen/AArch64/GlobalISel/arm64-pcsections.ll
  llvm/test/CodeGen/AArch64/GlobalISel/combine-unmerge.mir
  llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-divrem-insertpt-conflict.mir
  llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-divrem-insertpt-crash.mir
  llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-binop-same-val.mir
  llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-br.mir
  llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-bzero.mir
  llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-concat-vectors.mir
  llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-copy-prop-disabled.mir
  llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-prop-extends-phi.mir
  llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-ptradd-chain.mir
  llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-trivial-arith.mir
  llvm/test/CodeGen/AArch64/GlobalISel/uaddo-8-16-bits.mir
  llvm/test/CodeGen/AArch64/bool-ext-inc.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-imm-chain-illegal-types.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shl-from-extend-narrow.postlegal.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shl-from-extend-narrow.prelegal.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-ashr.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-lshr.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-shl.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
  llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll

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