[llvm] 698ae66 - [VPlan] Replace FMF in VPInstruction with VPRecipeWithIRFlags (NFC).
Florian Hahn via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 8 12:13:28 PDT 2023
Author: Florian Hahn
Date: 2023-08-08T20:13:11+01:00
New Revision: 698ae660923af74c55ee1f8a1874202cfb77474b
URL: https://github.com/llvm/llvm-project/commit/698ae660923af74c55ee1f8a1874202cfb77474b
DIFF: https://github.com/llvm/llvm-project/commit/698ae660923af74c55ee1f8a1874202cfb77474b.diff
LOG: [VPlan] Replace FMF in VPInstruction with VPRecipeWithIRFlags (NFC).
Update VPInstruction to use VPRecipeWithIRFlags to manage FMFs for
VPInstruction.
Reviewed By: Ayal
Differential Revision: https://reviews.llvm.org/D157144
Added:
Modified:
llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
llvm/lib/Transforms/Vectorize/VPlan.h
llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
index 87f31ca6b2dcb9..b7feec455c230a 100644
--- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -9167,10 +9167,10 @@ void LoopVectorizationPlanner::adjustRecipesForReductions(
// need to create an fmul recipe (multiplying the first two operands of
// the fmuladd together) to use as the vector operand for the fadd
// reduction.
- VPInstruction *FMulRecipe =
- new VPInstruction(Instruction::FMul, {CurrentLink->getOperand(0),
- CurrentLink->getOperand(1)});
- FMulRecipe->setFastMathFlags(CurrentLinkI->getFastMathFlags());
+ VPInstruction *FMulRecipe = new VPInstruction(
+ Instruction::FMul,
+ {CurrentLink->getOperand(0), CurrentLink->getOperand(1)},
+ CurrentLinkI->getFastMathFlags());
LinkVPBB->insert(FMulRecipe, CurrentLink->getIterator());
VecOp = FMulRecipe;
} else {
diff --git a/llvm/lib/Transforms/Vectorize/VPlan.h b/llvm/lib/Transforms/Vectorize/VPlan.h
index 2e481e6be906bc..c9da695fee8006 100644
--- a/llvm/lib/Transforms/Vectorize/VPlan.h
+++ b/llvm/lib/Transforms/Vectorize/VPlan.h
@@ -844,6 +844,8 @@ class VPRecipeWithIRFlags : public VPRecipeBase {
char AllowReciprocal : 1;
char AllowContract : 1;
char ApproxFunc : 1;
+
+ FastMathFlagsTy(const FastMathFlags &FMF);
};
OperationType OpType;
@@ -878,14 +880,7 @@ class VPRecipeWithIRFlags : public VPRecipeBase {
GEPFlags.IsInBounds = GEP->isInBounds();
} else if (auto *Op = dyn_cast<FPMathOperator>(&I)) {
OpType = OperationType::FPMathOp;
- FastMathFlags FMF = Op->getFastMathFlags();
- FMFs.AllowReassoc = FMF.allowReassoc();
- FMFs.NoNaNs = FMF.noNaNs();
- FMFs.NoInfs = FMF.noInfs();
- FMFs.NoSignedZeros = FMF.noSignedZeros();
- FMFs.AllowReciprocal = FMF.allowReciprocal();
- FMFs.AllowContract = FMF.allowContract();
- FMFs.ApproxFunc = FMF.approxFunc();
+ FMFs = Op->getFastMathFlags();
}
}
@@ -895,6 +890,12 @@ class VPRecipeWithIRFlags : public VPRecipeBase {
: VPRecipeBase(SC, Operands), OpType(OperationType::OverflowingBinOp),
WrapFlags(WrapFlags) {}
+ template <typename IterT>
+ VPRecipeWithIRFlags(const unsigned char SC, IterT Operands,
+ FastMathFlags FMFs)
+ : VPRecipeBase(SC, Operands), OpType(OperationType::FPMathOp),
+ FMFs(FMFs) {}
+
static inline bool classof(const VPRecipeBase *R) {
return R->getVPDefID() == VPRecipeBase::VPInstructionSC ||
R->getVPDefID() == VPRecipeBase::VPWidenSC ||
@@ -959,6 +960,9 @@ class VPRecipeWithIRFlags : public VPRecipeBase {
return GEPFlags.IsInBounds;
}
+ /// Returns true if the recipe has fast-math flags.
+ bool hasFastMathFlags() const { return OpType == OperationType::FPMathOp; }
+
FastMathFlags getFastMathFlags() const;
bool hasNoUnsignedWrap() const {
@@ -1008,7 +1012,6 @@ class VPInstruction : public VPRecipeWithIRFlags, public VPValue {
private:
typedef unsigned char OpcodeTy;
OpcodeTy Opcode;
- FastMathFlags FMF;
DebugLoc DL;
/// An optional name that can be used for the generated IR instruction.
@@ -1020,6 +1023,12 @@ class VPInstruction : public VPRecipeWithIRFlags, public VPValue {
/// one.
Value *generateInstruction(VPTransformState &State, unsigned Part);
+#if !defined(NDEBUG)
+ /// Return true if the VPInstruction is a floating point math operation, i.e.
+ /// has fast-math flags.
+ bool isFPMathOp() const;
+#endif
+
protected:
void setUnderlyingInstr(Instruction *I) { setUnderlyingValue(I); }
@@ -1038,6 +1047,9 @@ class VPInstruction : public VPRecipeWithIRFlags, public VPValue {
: VPRecipeWithIRFlags(VPDef::VPInstructionSC, Operands, WrapFlags),
VPValue(this), Opcode(Opcode), DL(DL), Name(Name.str()) {}
+ VPInstruction(unsigned Opcode, std::initializer_list<VPValue *> Operands,
+ FastMathFlags FMFs, DebugLoc DL = {}, const Twine &Name = "");
+
VP_CLASSOF_IMPL(VPDef::VPInstructionSC)
VPInstruction *clone() const {
@@ -1091,9 +1103,6 @@ class VPInstruction : public VPRecipeWithIRFlags, public VPValue {
}
}
- /// Set the fast-math flags.
- void setFastMathFlags(FastMathFlags FMFNew);
-
/// Returns true if the recipe only uses the first lane of operand \p Op.
bool onlyFirstLaneUsed(const VPValue *Op) const override {
assert(is_contained(operands(), Op) &&
diff --git a/llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp b/llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
index 4469264255705a..dec7f73b013768 100644
--- a/llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
+++ b/llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
@@ -230,6 +230,15 @@ FastMathFlags VPRecipeWithIRFlags::getFastMathFlags() const {
return Res;
}
+VPInstruction::VPInstruction(unsigned Opcode,
+ std::initializer_list<VPValue *> Operands,
+ FastMathFlags FMFs, DebugLoc DL, const Twine &Name)
+ : VPRecipeWithIRFlags(VPDef::VPInstructionSC, Operands, FMFs),
+ VPValue(this), Opcode(Opcode), DL(DL), Name(Name.str()) {
+ // Make sure the VPInstruction is a floating-point operation.
+ assert(isFPMathOp() && "this op can't take fast-math flags");
+}
+
Value *VPInstruction::generateInstruction(VPTransformState &State,
unsigned Part) {
IRBuilderBase &Builder = State.Builder;
@@ -373,10 +382,24 @@ Value *VPInstruction::generateInstruction(VPTransformState &State,
}
}
+#if !defined(NDEBUG)
+bool VPInstruction::isFPMathOp() const {
+ // Inspired by FPMathOperator::classof. Notable
diff erences are that we don't
+ // support Call, PHI and Select opcodes here yet.
+ return Opcode == Instruction::FAdd || Opcode == Instruction::FMul ||
+ Opcode == Instruction::FNeg || Opcode == Instruction::FSub ||
+ Opcode == Instruction::FDiv || Opcode == Instruction::FRem ||
+ Opcode == Instruction::FCmp;
+}
+#endif
+
void VPInstruction::execute(VPTransformState &State) {
assert(!State.Instance && "VPInstruction executing an Instance");
IRBuilderBase::FastMathFlagGuard FMFGuard(State.Builder);
- State.Builder.setFastMathFlags(FMF);
+ assert(hasFastMathFlags() == isFPMathOp() &&
+ "Recipe not a FPMathOp but has fast-math flags?");
+ if (hasFastMathFlags())
+ State.Builder.setFastMathFlags(getFastMathFlags());
for (unsigned Part = 0; Part < State.UF; ++Part) {
Value *GeneratedValue = generateInstruction(State, Part);
if (!hasResult())
@@ -439,7 +462,6 @@ void VPInstruction::print(raw_ostream &O, const Twine &Indent,
O << Instruction::getOpcodeName(getOpcode());
}
- O << FMF;
printFlags(O);
printOperands(O, SlotTracker);
@@ -450,16 +472,6 @@ void VPInstruction::print(raw_ostream &O, const Twine &Indent,
}
#endif
-void VPInstruction::setFastMathFlags(FastMathFlags FMFNew) {
- // Make sure the VPInstruction is a floating-point operation.
- assert((Opcode == Instruction::FAdd || Opcode == Instruction::FMul ||
- Opcode == Instruction::FNeg || Opcode == Instruction::FSub ||
- Opcode == Instruction::FDiv || Opcode == Instruction::FRem ||
- Opcode == Instruction::FCmp) &&
- "this op can't take fast-math flags");
- FMF = FMFNew;
-}
-
void VPWidenCallRecipe::execute(VPTransformState &State) {
assert(State.VF.isVector() && "not widening");
auto &CI = *cast<CallInst>(getUnderlyingInstr());
@@ -576,6 +588,17 @@ void VPWidenSelectRecipe::execute(VPTransformState &State) {
}
}
+VPRecipeWithIRFlags::FastMathFlagsTy::FastMathFlagsTy(
+ const FastMathFlags &FMF) {
+ AllowReassoc = FMF.allowReassoc();
+ NoNaNs = FMF.noNaNs();
+ NoInfs = FMF.noInfs();
+ NoSignedZeros = FMF.noSignedZeros();
+ AllowReciprocal = FMF.allowReciprocal();
+ AllowContract = FMF.allowContract();
+ ApproxFunc = FMF.approxFunc();
+}
+
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
void VPRecipeWithIRFlags::printFlags(raw_ostream &O) const {
switch (OpType) {
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