[PATCH] D157273: [GlobalISel] Add dead flags to implicit defs in ISel

Pierre van Houtryve via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 8 02:49:01 PDT 2023 

Pierre-vh updated this revision to Diff 548132.
Pierre-vh marked 4 inline comments as done.
Pierre-vh added a comment.

Comments


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D157273/new/

https://reviews.llvm.org/D157273

Files:
  llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutor.h
  llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h
  llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-compare.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-binop.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-ptr-add.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-add.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-and.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-brcond.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-build-vector-trunc.v2s16.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ctpop.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extract-vector-elt.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert-vector-elt.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-or.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-add3.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-and-or.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-or3.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-smed3.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-umed3.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-xor3.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-smax.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-smin.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sub.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-umax.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-umin.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-xor.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.add.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.cmpswap.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.fadd.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.f16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f32.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.add.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.cmpswap.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.f16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f32.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.f16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.f16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.i8.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.f16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.f16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.i8.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.buffer.load.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.add.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.cmpswap.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.fadd.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.f16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f32.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.add.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.cmpswap.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.f16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f32.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.f16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.f16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.ll
  llvm/test/CodeGen/Mips/GlobalISel/instruction-select/branch.mir
  llvm/test/CodeGen/Mips/GlobalISel/instruction-select/phi.mir
  llvm/test/CodeGen/X86/GlobalISel/mul-scalar.ll
  llvm/test/CodeGen/X86/GlobalISel/select-add.mir
  llvm/test/CodeGen/X86/GlobalISel/select-and-scalar.mir
  llvm/test/CodeGen/X86/GlobalISel/select-blsi.mir
  llvm/test/CodeGen/X86/GlobalISel/select-blsr.mir
  llvm/test/CodeGen/X86/GlobalISel/select-mul-scalar.mir
  llvm/test/CodeGen/X86/GlobalISel/select-or-scalar.mir
  llvm/test/CodeGen/X86/GlobalISel/select-undef.mir
  llvm/test/CodeGen/X86/GlobalISel/select-xor-scalar.mir
  llvm/utils/TableGen/GlobalISelEmitter.cpp
  llvm/utils/TableGen/GlobalISelMatchTable.cpp
  llvm/utils/TableGen/GlobalISelMatchTable.h

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