[PATCH] D157077: [RISCV] Teach VSETVLIInserter to not demand tail policy when there is no tail element

Jianjian Guan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 7 20:34:06 PDT 2023


jacquesguan marked 2 inline comments as done.
jacquesguan added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp:347
 
+  // VLMAX does not need tail policy.
+  if (RISCVII::hasVLOp(MI.getDesc().TSFlags)) {
----------------
craig.topper wrote:
> This is incorrect for vcompress, reductions, and vmv.s.x.
Done, exclude these instructions.


================
Comment at: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp:352
+    if (VLMul < RISCVII::LMUL_RESERVED) {
+      const MachineOperand &VLOp = MI.getOperand(getVLOpNum(MI));
+      if (VLOp.isImm()) {
----------------
luke wrote:
> The VL operand can be stale here because this is called from doLocalPostpass, after the pseudo has been expanded and the vsetvlis are inserted. Is it possible to move this into needVSETVLI?
Done, moved to `needVSETVLI`.


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  https://reviews.llvm.org/D157077/new/

https://reviews.llvm.org/D157077



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