[PATCH] D157279: [CodeGen] Disable FP LD1RX instructions generation for Neoverse-V1

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm accepted this revision.
paulwalker-arm added a comment.
This revision is now accepted and ready to land.

A couple of late requests but otherwise looks good.



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Comment at: llvm/lib/Target/AArch64/AArch64.td:152
+def FeatureNoSVEFPLD1R : SubtargetFeature<"no-sve-fp-ld1r",
+  "NoSVEFPLD1R", "true", "Prefer LDR(LDP)+MOV over LD1RX for FP">;
+
----------------
The `LDP` is not relevant here. It was just a quirk of the code where you observed the issue.


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Comment at: llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td:2358
 
-  // LD1R of FP data
-  defm : LD1RPat<nxv8f16, load, LD1RH_IMM,   PTRUE_H, f16, am_indexed16_6b, uimm6s2>;
-  defm : LD1RPat<nxv4f16, load, LD1RH_S_IMM, PTRUE_S, f16, am_indexed16_6b, uimm6s2>;
-  defm : LD1RPat<nxv2f16, load, LD1RH_D_IMM, PTRUE_D, f16, am_indexed16_6b, uimm6s2>;
-  defm : LD1RPat<nxv4f32, load, LD1RW_IMM,   PTRUE_S, f32, am_indexed32_6b, uimm6s4>;
-  defm : LD1RPat<nxv2f32, load, LD1RW_D_IMM, PTRUE_D, f32, am_indexed32_6b, uimm6s4>;
-  defm : LD1RPat<nxv2f64, load, LD1RD_IMM,   PTRUE_D, f64, am_indexed64_6b, uimm6s8>;
+  let Predicates = [UseSVEFPLD1R] in {
+    // LD1R of FP data
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Sorry I missed this before but this'll override the existing value for `Predicates` and so you'll need to add `HasSVEorSME` to be correct.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D157279/new/

https://reviews.llvm.org/D157279