[PATCH] D157088: [AMDGPU][NFC] Refine representation of register intervals in SIInsertWaitcnts.

Jay Foad via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 7 06:33:50 PDT 2023


foad added a comment.

> Currently, we represent register intervals as pairs of corresponding encoding values. The main idea behind this this patch is to replace such pairs with structures that represent the intervals in a more abstract way, thus conceptually separating the encoding details from the rest of the logic in the pass.
>
> The new structures are still essentially pairs of integers representing the interval boundaries, but now make no references to encodings and have more suitably named fields.

Personally I don't see much benefit to the "make no references to encodings" abstraction unless you are planning to change things, such that the interval endpoints are no longer register encoding values. Are you?

> Using the chance, the type of endpoints was changed to unsigned to match the types of values they are compared against.

Sure, seems nice, and it looks like {0, 0} works naturally as a placeholder so there was no need for the old code to use {-1, -1}.

> The interval structures were also made iterable to simplify the code.

That is nice.


Repository:
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  https://reviews.llvm.org/D157088/new/

https://reviews.llvm.org/D157088



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