[PATCH] D157089: [AMDGPU] Fix dealing with register interval endpoints in SIInsertWaitcnts.

[Jay Foad via Phabricator via llvm-commits]

foad accepted this revision.
foad added a comment.
This revision is now accepted and ready to land.

> This fixes incorrect code and so was the intention. The original code is known to be incorrect because it violates use conventions for RegInterval as a concept, which in turn we know from its other uses, of which there are many.

OK. I was mostly looking at the current upstream code, where `RegisterEncoding` does not use `RegInterval`s. Having looked more closely at what you did in D157088 <https://reviews.llvm.org/D157088>, I think I understand your point of view.

I would have found it less confusing if you had swapped the order of these two patches, or even squashed them together, but it does not really matter now.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D157089/new/

https://reviews.llvm.org/D157089