[PATCH] D155355: [AArch64] Set maximum vscale VF with shouldMaximizeVectorBandwidth

[Dave Green via Phabricator via llvm-commits]

dmgreen added a comment.

For the record - In SVE2 there are a number of instructions that can use top/bottom lanes providing the backend does some sort of lane interleaving. Once that is done this might make a lot of sense but it might be better to address that first.


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  https://reviews.llvm.org/D155355/new/

https://reviews.llvm.org/D155355