[llvm] 33e25cd - [FPEnv][X86] Correct strictfp tests.
Kevin P. Neal via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 26 10:36:29 PDT 2023
Author: Kevin P. Neal
Date: 2023-07-26T13:35:58-04:00
New Revision: 33e25cdd4882dc9d5a85ef16057f9d5217b682ac
URL: https://github.com/llvm/llvm-project/commit/33e25cdd4882dc9d5a85ef16057f9d5217b682ac
DIFF: https://github.com/llvm/llvm-project/commit/33e25cdd4882dc9d5a85ef16057f9d5217b682ac.diff
LOG: [FPEnv][X86] Correct strictfp tests.
Recommit only the tests that look good this time.
Correct X86 strictfp tests to follow the rules documented in the LangRef:
https://llvm.org/docs/LangRef.html#constrained-floating-point-intrinsics
Mostly these tests just needed the strictfp attribute on function
definitions. After D154991 the constrained intrinsics have the
strictfp attribute by default so they don't need it here, but other
functions do.
Test changes verified with D146845.
Added:
Modified:
llvm/test/CodeGen/X86/half-darwin.ll
llvm/test/CodeGen/X86/is_fpclass-fp80.ll
llvm/test/CodeGen/X86/is_fpclass.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/half-darwin.ll b/llvm/test/CodeGen/X86/half-darwin.ll
index cdc188b3039c2d..1d2f4eb39bbe62 100644
--- a/llvm/test/CodeGen/X86/half-darwin.ll
+++ b/llvm/test/CodeGen/X86/half-darwin.ll
@@ -94,7 +94,7 @@ define float @extendhfsf(ptr %ptr) nounwind {
ret float %float
}
-define void @strict_truncsfhf(float %in, ptr %ptr) nounwind {
+define void @strict_truncsfhf(float %in, ptr %ptr) nounwind strictfp {
; CHECK-SOFT-LABEL: strict_truncsfhf:
; CHECK-SOFT: ## %bb.0:
; CHECK-SOFT-NEXT: pushq %rbx
@@ -126,7 +126,7 @@ define void @strict_truncsfhf(float %in, ptr %ptr) nounwind {
ret void
}
-define void @strict_truncdfhf(double %in, ptr %ptr) nounwind {
+define void @strict_truncdfhf(double %in, ptr %ptr) nounwind strictfp {
; CHECK-SOFT-LABEL: strict_truncdfhf:
; CHECK-SOFT: ## %bb.0:
; CHECK-SOFT-NEXT: pushq %rbx
@@ -157,7 +157,7 @@ define void @strict_truncdfhf(double %in, ptr %ptr) nounwind {
ret void
}
-define float @strict_extendhfsf(ptr %ptr) nounwind {
+define float @strict_extendhfsf(ptr %ptr) nounwind strictfp {
; CHECK-SOFT-LABEL: strict_extendhfsf:
; CHECK-SOFT: ## %bb.0:
; CHECK-SOFT-NEXT: pushq %rax
diff --git a/llvm/test/CodeGen/X86/is_fpclass-fp80.ll b/llvm/test/CodeGen/X86/is_fpclass-fp80.ll
index 5803d9dfb43d26..ec2323ac2250c7 100644
--- a/llvm/test/CodeGen/X86/is_fpclass-fp80.ll
+++ b/llvm/test/CodeGen/X86/is_fpclass-fp80.ll
@@ -70,7 +70,7 @@ define i1 @is_nan_f80_strict(x86_fp80 %x) strictfp {
; CHECK-64-NEXT: orb %dl, %al
; CHECK-64-NEXT: retq
entry:
- %0 = tail call i1 @llvm.is.fpclass.f80(x86_fp80 %x, i32 3) ; "nan"
+ %0 = tail call i1 @llvm.is.fpclass.f80(x86_fp80 %x, i32 3) strictfp ; "nan"
ret i1 %0
}
@@ -197,7 +197,7 @@ define i1 @is_zero_f80_strict(x86_fp80 %x) strictfp {
; CHECK-64-NEXT: sete %al
; CHECK-64-NEXT: retq
entry:
- %0 = tail call i1 @llvm.is.fpclass.f80(x86_fp80 %x, i32 96) ; 0x60 = "zero"
+ %0 = tail call i1 @llvm.is.fpclass.f80(x86_fp80 %x, i32 96) strictfp ; 0x60 = "zero"
ret i1 %0
}
diff --git a/llvm/test/CodeGen/X86/is_fpclass.ll b/llvm/test/CodeGen/X86/is_fpclass.ll
index 47cf85d17ece8f..2046d790cc57e4 100644
--- a/llvm/test/CodeGen/X86/is_fpclass.ll
+++ b/llvm/test/CodeGen/X86/is_fpclass.ll
@@ -986,7 +986,7 @@ define i1 @isnan_f_strictfp(float %x) strictfp {
; CHECK-64-NEXT: setge %al
; CHECK-64-NEXT: retq
entry:
- %0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 3) ; "nan"
+ %0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 3) strictfp ; "nan"
ret i1 %0
}
@@ -1007,7 +1007,7 @@ define i1 @not_isnan_f_strictfp(float %x) strictfp {
; CHECK-64-NEXT: setl %al
; CHECK-64-NEXT: retq
entry:
- %0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 1020) ; ~"nan"
+ %0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 1020) strictfp ; ~"nan"
ret i1 %0
}
@@ -1028,7 +1028,7 @@ define i1 @isfinite_f_strictfp(float %x) strictfp {
; CHECK-64-NEXT: setl %al
; CHECK-64-NEXT: retq
entry:
- %0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 504) ; 0x1f8 = "finite"
+ %0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 504) strictfp ; 0x1f8 = "finite"
ret i1 %0
}
@@ -1049,7 +1049,7 @@ define i1 @not_isfinite_f_strictfp(float %x) strictfp {
; CHECK-64-NEXT: setge %al
; CHECK-64-NEXT: retq
entry:
- %0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 519) ; ~0x1f8 = ~"finite"
+ %0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 519) strictfp ; ~0x1f8 = ~"finite"
ret i1 %0
}
@@ -1067,7 +1067,7 @@ define i1 @iszero_f_strictfp(float %x) strictfp {
; CHECK-64-NEXT: sete %al
; CHECK-64-NEXT: retq
entry:
- %0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 96) ; 0x60 = "zero"
+ %0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 96) strictfp ; 0x60 = "zero"
ret i1 %0
}
@@ -1085,7 +1085,7 @@ define i1 @not_iszero_f_strictfp(float %x) strictfp {
; CHECK-64-NEXT: setne %al
; CHECK-64-NEXT: retq
entry:
- %0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 927) ; ~0x60 = ~"zero"
+ %0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 927) strictfp ; ~0x60 = ~"zero"
ret i1 %0
}
@@ -1311,7 +1311,7 @@ define i1 @isnan_d_strictfp(double %x) strictfp {
; CHECK-64-NEXT: setg %al
; CHECK-64-NEXT: retq
entry:
- %0 = tail call i1 @llvm.is.fpclass.f64(double %x, i32 3) ; "nan"
+ %0 = tail call i1 @llvm.is.fpclass.f64(double %x, i32 3) strictfp ; "nan"
ret i1 %0
}
@@ -1332,7 +1332,7 @@ define i1 @iszero_d_strictfp(double %x) strictfp {
; CHECK-64-NEXT: sete %al
; CHECK-64-NEXT: retq
entry:
- %0 = tail call i1 @llvm.is.fpclass.f64(double %x, i32 96) ; 0x60 = "zero"
+ %0 = tail call i1 @llvm.is.fpclass.f64(double %x, i32 96) strictfp ; 0x60 = "zero"
ret i1 %0
}
@@ -1376,7 +1376,7 @@ define <1 x i1> @isnan_v1f_strictfp(<1 x float> %x) strictfp {
; CHECK-64-NEXT: setge %al
; CHECK-64-NEXT: retq
entry:
- %0 = tail call <1 x i1> @llvm.is.fpclass.v1f32(<1 x float> %x, i32 3) ; "nan"
+ %0 = tail call <1 x i1> @llvm.is.fpclass.v1f32(<1 x float> %x, i32 3) strictfp ; "nan"
ret <1 x i1> %0
}
@@ -1457,7 +1457,7 @@ define <2 x i1> @isnan_v2f_strictfp(<2 x float> %x) strictfp {
; CHECK-64-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; CHECK-64-NEXT: retq
entry:
- %0 = tail call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %x, i32 3) ; "nan"
+ %0 = tail call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %x, i32 3) strictfp ; "nan"
ret <2 x i1> %0
}
@@ -1548,7 +1548,7 @@ define <4 x i1> @isnan_v4f_strictfp(<4 x float> %x) strictfp {
; CHECK-64-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; CHECK-64-NEXT: retq
entry:
- %0 = tail call <4 x i1> @llvm.is.fpclass.v4f32(<4 x float> %x, i32 3) ; "nan"
+ %0 = tail call <4 x i1> @llvm.is.fpclass.v4f32(<4 x float> %x, i32 3) strictfp ; "nan"
ret <4 x i1> %0
}
More information about the llvm-commits
mailing list