[PATCH] D156287: [RISCV] Add codegen support for bf16 vector

[Jessica Clarke via Phabricator via llvm-commits]

jrtc27 added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td:6695
+
+let Predicates = [HasStdExtZvfbfwma] in {
+defm PseudoVFWMACCBF16  : VPseudoVWMAC_VV_VF_BF_RM;
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craig.topper wrote:
> Putting the predicate on the instruction only affects the assembler, but these are pseudos so the assembler doesn't matter. The Predicate needs to be on the pattern.
They're helpful for documenting what pseudos are available though (and I believe affect the machine verifier?)


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  https://reviews.llvm.org/D156287/new/

https://reviews.llvm.org/D156287