[PATCH] D156287: [RISCV] Add codegen support for bf16 vector

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td:6695
+
+let Predicates = [HasStdExtZvfbfwma] in {
+defm PseudoVFWMACCBF16  : VPseudoVWMAC_VV_VF_BF_RM;
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Putting the predicate on the instruction only affects the assembler, but these are pseudos so the assembler doesn't matter. The Predicate needs to be on the pattern.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D156287/new/

https://reviews.llvm.org/D156287