[PATCH] D156097: [TableGen][RegisterInfoEmitter] Make entries of base register class tables human-readable.
Ivan Kosarev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 26 08:57:21 PDT 2023
kosarev added a comment.
> are you trying to edit these tables by hand / have LIT tests that contains the table gen output?
No, I needed to see how D156099 <https://reviews.llvm.org/D156099> affects the choice of base classes, which is virtually impossible to do when they are represented as a long line of raw numbers.
> The table indirection is about trying to keep memory usage/binary size down.
> Since we have ~9000 registers, this increases the size of the tables ~18kb.
Yeah, I think considering the size of other tables it's not worth the extra complexity.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D156097/new/
https://reviews.llvm.org/D156097
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