[PATCH] D156097: [TableGen][RegisterInfoEmitter] Make entries of base register class tables human-readable.

[Carl Ritson via Phabricator via llvm-commits]

critson added a comment.

The table indirection is about trying to keep memory usage/binary size down.
Since we have ~9000 registers, this increases the size of the tables ~18kb.

The code looks fine and I will accept it, but can you clarify the objective/context of the change (here or offline)?
e.g. are you trying to edit these tables by hand / have LIT tests that contains the table gen output?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D156097/new/

https://reviews.llvm.org/D156097