[llvm] 84d4618 - [RISCV] Fix the check assertion in hasMergeOp and hasMaskOp
Jianjian GUAN via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 25 20:21:58 PDT 2023
Author: Jianjian GUAN
Date: 2023-07-26T11:21:50+08:00
New Revision: 84d4618a025b1d261ecc1c9bbe8c393092a43761
URL: https://github.com/llvm/llvm-project/commit/84d4618a025b1d261ecc1c9bbe8c393092a43761
DIFF: https://github.com/llvm/llvm-project/commit/84d4618a025b1d261ecc1c9bbe8c393092a43761.diff
LOG: [RISCV] Fix the check assertion in hasMergeOp and hasMaskOp
Because we have STRICT_FCVT_W_RV64 equal to ISD::FIRST_TARGET_STRICTFP_OPCODE, the check needs to be splitted into 2 parts.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D155683
Added:
Modified:
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/RISCV/RISCVISelLowering.h
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 3635e3976929b0..60189123463f88 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -4726,9 +4726,12 @@ static unsigned getRISCVVLOp(SDValue Op) {
/// Return true if a RISC-V target specified op has a merge operand.
static bool hasMergeOp(unsigned Opcode) {
assert(Opcode > RISCVISD::FIRST_NUMBER &&
- Opcode <= RISCVISD::STRICT_VFROUND_NOEXCEPT_VL &&
+ Opcode <= RISCVISD::LAST_RISCV_STRICTFP_OPCODE &&
"not a RISC-V target specific op");
- assert(RISCVISD::STRICT_VFROUND_NOEXCEPT_VL - RISCVISD::FIRST_NUMBER == 421 &&
+ assert(RISCVISD::LAST_VL_VECTOR_OP - RISCVISD::FIRST_VL_VECTOR_OP == 122 &&
+ RISCVISD::LAST_RISCV_STRICTFP_OPCODE -
+ ISD::FIRST_TARGET_STRICTFP_OPCODE ==
+ 21 &&
"adding target specific op should update this function");
if (Opcode >= RISCVISD::ADD_VL && Opcode <= RISCVISD::FMAXNUM_VL)
return true;
@@ -4744,9 +4747,12 @@ static bool hasMergeOp(unsigned Opcode) {
/// Return true if a RISC-V target specified op has a mask operand.
static bool hasMaskOp(unsigned Opcode) {
assert(Opcode > RISCVISD::FIRST_NUMBER &&
- Opcode <= RISCVISD::STRICT_VFROUND_NOEXCEPT_VL &&
+ Opcode <= RISCVISD::LAST_RISCV_STRICTFP_OPCODE &&
"not a RISC-V target specific op");
- assert(RISCVISD::STRICT_VFROUND_NOEXCEPT_VL - RISCVISD::FIRST_NUMBER == 421 &&
+ assert(RISCVISD::LAST_VL_VECTOR_OP - RISCVISD::FIRST_VL_VECTOR_OP == 122 &&
+ RISCVISD::LAST_RISCV_STRICTFP_OPCODE -
+ ISD::FIRST_TARGET_STRICTFP_OPCODE ==
+ 21 &&
"adding target specific op should update this function");
if (Opcode >= RISCVISD::TRUNCATE_VECTOR_VL && Opcode <= RISCVISD::SETCC_VL)
return true;
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.h b/llvm/lib/Target/RISCV/RISCVISelLowering.h
index 164ded95a1b5c3..1809e1c57c9210 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.h
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.h
@@ -143,10 +143,11 @@ enum NodeType : unsigned {
SM3P0, SM3P1,
// Vector Extension
+ FIRST_VL_VECTOR_OP,
// VMV_V_V_VL matches the semantics of vmv.v.v but includes an extra operand
// for the VL value to be used for the operation. The first operand is
// passthru operand.
- VMV_V_V_VL,
+ VMV_V_V_VL = FIRST_VL_VECTOR_OP,
// VMV_V_X_VL matches the semantics of vmv.v.x but includes an extra operand
// for the VL value to be used for the operation. The first operand is
// passthru operand.
@@ -166,8 +167,6 @@ enum NodeType : unsigned {
// expanded late to two scalar stores and a stride 0 vector load.
// The first operand is passthru operand.
SPLAT_VECTOR_SPLIT_I64_VL,
- // Read VLENB CSR
- READ_VLENB,
// Truncates a RVV integer vector by one power-of-two. Carries both an extra
// mask and VL operand.
TRUNCATE_VECTOR_VL,
@@ -360,6 +359,10 @@ enum NodeType : unsigned {
// vfirst.m with additional mask and VL operands.
VFIRST_VL,
+ LAST_VL_VECTOR_OP = VFIRST_VL,
+
+ // Read VLENB CSR
+ READ_VLENB,
// Reads value of CSR.
// The first operand is a chain pointer. The second specifies address of the
// required CSR. Two results are produced, the read value and the new chain
@@ -405,6 +408,7 @@ enum NodeType : unsigned {
STRICT_FSETCC_VL,
STRICT_FSETCCS_VL,
STRICT_VFROUND_NOEXCEPT_VL,
+ LAST_RISCV_STRICTFP_OPCODE = STRICT_VFROUND_NOEXCEPT_VL,
// WARNING: Do not add anything in the end unless you want the node to
// have memop! In fact, starting from FIRST_TARGET_MEMORY_OPCODE all
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