[PATCH] D156105: [AMDGPU][True16] Support generating differently-sized register transfers.
Stanislav Mekhanoshin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 24 10:52:04 PDT 2023
rampitec added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:741
+ MCRegister &RegToFix = (Size == 16) ? DestReg : SrcReg;
+ MCRegister Super = RI.get32BitRegister(RegToFix);
+ assert(RI.getSubReg(Super, AMDGPU::lo16) == RegToFix ||
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https://reviews.llvm.org/D156105/new/
https://reviews.llvm.org/D156105
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