[PATCH] D155150: [RISCV] Lower VP_CTLZ_ZERO_UNDEF/VP_CTTZ_ZERO_UNDEF/VP_CTLZ by converting to FP and extracting the exponent.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:4374
   unsigned Adjust = ExponentBias + (EltSize - 1);
   SDValue Res =
       DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(Adjust, DL, VT), Exp);
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craig.topper wrote:
> Don't create this new if its a VP opcode
That should have said "Don't create this node"


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D155150/new/

https://reviews.llvm.org/D155150