[PATCH] D144829: [WIP][BPF] Add a few new insns under cpu=v4

[Yonghong Song via Phabricator via llvm-commits]

yonghong-song added inline comments.


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Comment at: llvm/lib/Target/BPF/BPFInstrInfo.td:56
 def BPFNoALU32 : Predicate<"!Subtarget->getHasAlu32()">;
+def BPFHasCPUv4_ldsx : Predicate<"Subtarget->getCPUv4_ldsx()">;
+def BPFHasCPUv4_movsx : Predicate<"Subtarget->getCPUv4_movsx()">;
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ast wrote:
> Here and elsewhere... let's drop CPUv4 mid prefix. imo the extra verbosity doesn't improve readability.
> Same with the flag: disable-cpuv4-movsx. I can be disable-movsx.
> 
> s/BPFHasCPUv4_ldsx/BPFHasLdsx/
> s/getCPUv4_bswap/getHasBswap/ or even shorter hasBswap ?
Make sense. Will do. Ya, hasBswap is good enough to capture what it means.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D144829/new/

https://reviews.llvm.org/D144829