[PATCH] D155343: MachineSink: Fix sinking VGPR def out of a divergent loop
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 14 15:23:08 PDT 2023
arsenm created this revision.
arsenm added reviewers: AMDGPU, rampitec, ruiling, foad, vangthao, MatzeB, efriedma, nhaehnle, critson, qcolombet, craig.topper, jonpa, nickdesaulniers.
Herald added subscribers: StephenFan, kerbowa, hiraditya, jvesely.
Herald added a project: All.
arsenm requested review of this revision.
Herald added a subscriber: wdng.
Herald added a project: LLVM.
This fixes sinking a VGPR def out of a loop past the reconvergence
point at the SI_END_CF. There was a prior fix which introduced
blockPrologueInterferes (D121277 <https://reviews.llvm.org/D121277>) to fix the same basic problem for
the post RA sink. This also had the special case isIgnorableUse case
which was incorrect, because in some contexts the exec use is not
ignorable.
I'm thinking of a new way to represent this which will avoid needing
hasIgnorableUse and isBasicBlockPrologue.
Fixes: SWDEV-407790
https://reviews.llvm.org/D155343
Files:
llvm/lib/CodeGen/MachineSink.cpp
llvm/test/CodeGen/AMDGPU/machine-sink-loop-var-out-of-divergent-loop-swdev407790.ll
llvm/test/CodeGen/AMDGPU/machine-sink-loop-var-out-of-divergent-loop-swdev407790.mir
llvm/test/CodeGen/AMDGPU/sink-after-control-flow.mir
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