[PATCH] D155284: [GlobalISel] Fix infinite loop in reassociation combine
Amara Emerson via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 14 12:19:08 PDT 2023
aemerson accepted this revision.
aemerson added inline comments.
This revision is now accepted and ready to land.
================
Comment at: llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp:4478-4479
- if (isConstantOrConstantSplatVector(*MRI.getVRegDef(OpLHSRHS), MRI)) {
+ if (isConstantOrConstantSplatVector(*MRI.getVRegDef(OpLHSRHS), MRI) &&
+ !isConstantOrConstantSplatVector(*MRI.getVRegDef(OpLHSLHS), MRI)) {
if (isConstantOrConstantSplatVector(*OpRHSDef, MRI)) {
----------------
Ca you add a comment here to explain why we do the second constant check.
================
Comment at: llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizer-combiner-reassoc.mir:21
+ %0:_(s32) = COPY $vgpr0
+ %7:_(s32) = G_CONSTANT i32 0
+ %13:_(s32) = G_CONSTANT i32 1
----------------
arsenm wrote:
> should run-pass=none to compact the register numbers, it's sometimes annoying when the register numbers actually tested don't match the ones in the file
TIL
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D155284/new/
https://reviews.llvm.org/D155284
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