[PATCH] D154858: [AMDGPU] Add llvm.amdgcn.wave.reduce.umin/umax Intrinsic.

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 13 12:20:45 PDT 2023


arsenm added inline comments.


================
Comment at: llvm/docs/AMDGPUUsage.rst:984
+                                             unsigned value (first operand). It takes hint for scan
+                                             strategy using second operand (0 for `DPP`` and 1 for 
+                                             `iterative approach`.
----------------
arsenm wrote:
> Elaborate that it should work if the target doesn't support the mode (e.g. gfx6/7 have no DPP)
The default 0 should mean target default preference. The higher values should request a specific strategy


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  https://reviews.llvm.org/D154858/new/

https://reviews.llvm.org/D154858



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