[PATCH] D155140: [RISCV] Add isMoveReg to vmv1r/vmv2r/vmv4r/vmv8r.v.

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
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This allows TII isCopyInstrImpl to consider them copies.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D155140

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfoV.td


Index: llvm/lib/Target/RISCV/RISCVInstrInfoV.td
===================================================================
--- llvm/lib/Target/RISCV/RISCVInstrInfoV.td
+++ llvm/lib/Target/RISCV/RISCVInstrInfoV.td
@@ -1683,7 +1683,7 @@
 defm VCOMPRESS_V : VCPR_MV_Mask<"vcompress", 0b010111>;
 } // Constraints = "@earlyclobber $vd", RVVConstraint = Vcompress
 
-let hasSideEffects = 0, mayLoad = 0, mayStore = 0,
+let hasSideEffects = 0, mayLoad = 0, mayStore = 0, isMoveReg = 1,
     RVVConstraint = NoConstraint in {
 // A future extension may relax the vector register alignment restrictions.
 foreach n = [1, 2, 4, 8] in {


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