[PATCH] D155095: TargetLowering: fix an infinite DAG combine in SimplifySETCC
Jon Roelofs via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 12 08:54:46 PDT 2023
jroelofs added inline comments.
================
Comment at: llvm/test/CodeGen/AArch64/arm64-setcc-swap-infloop.ll:25
+; CHECK-NEXT: ret
+ call void @llvm.memset.p0.i64(ptr nonnull null, i8 1, i64 32, i1 false)
+ %v = getelementptr inbounds i8, ptr null, i64 16
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The bug is really sensitive to the UB here. Removing any of the UB on these first 3 lines makes the bug go away.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D155095/new/
https://reviews.llvm.org/D155095
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