[PATCH] D155063: [RISCV] Simplify operand logic in vmerge combine. NFCI

Luke Lau via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jul 12 07:42:33 PDT 2023


luke updated this revision to Diff 539557.
luke added a comment.

Remove unnecessary if statement


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D155063/new/

https://reviews.llvm.org/D155063

Files:
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp

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