[PATCH] D155063: [RISCV] Simplify operand logic in vmerge combine. NFCI

[Luke Lau via Phabricator via llvm-commits]

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I find this a bit easier to follow, and it makes an upcoming rework of D153351 <https://reviews.llvm.org/D153351>
simpler.
Since we always end up creating a node with the same number of operands, don't
differentiate between whether or not True was masked.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D155063

Files:
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp

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