[PATCH] D154756: [AArch64] Add scheduling model for Neoverse V1

Evandro Menezes via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 11 15:19:36 PDT 2023


evandro marked an inline comment as done.
evandro added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td:29
+
+  list<Predicate> UnsupportedFeatures = !listconcat(SMEUnsupported.F, [HasMTE]);
+}
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dmgreen wrote:
> Does it help to add SVE2 too?
The Neoverse V1 does not support Armv9.


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Comment at: llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td:58
+                              V1UnitM0, V1UnitM1]>;   // Integer units
+def V1UnitJ   : ProcResGroup<[V1UnitS, V1UnitM0]>;    // Integer 0-2 units
+def V1UnitM   : ProcResGroup<[V1UnitM0, V1UnitM1]>;   // Integer multicycle units
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dmgreen wrote:
> J is invented to model the instructions that set flags, that have a throughput of 3?
Correct, gleaned from similar AArch32 instructions.


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Comment at: llvm/test/tools/llvm-mca/AArch64/Neoverse/512tvb-sve-instructions.s:4
 
 # Check the Neoverse N2 model is used.
 
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tschuett wrote:
> Nit: V1 model?
Perhaps it deserves a more comprehensive test case than just a single instruction.


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Comment at: llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-neon-instructions.s:22
+addp v0.8b, v0.8b, v0.8b
+and v0.8b, v0.8b, v0.8b
+bic v0.4h, #15, lsl #8
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dmgreen wrote:
> The Neoverse-V2 version of this file has some extra instructions like addv's, aes and some dup instructions, among others.
It has many more instructions, but SVE2 ones.  I'll add more coverage here.


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