[PATCH] D153607: [CSKY] Optimize conditional branch

Sergei Barannikov via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Jul 2 23:07:29 PDT 2023


barannikov88 added a comment.

In D153607#4462927 <https://reviews.llvm.org/D153607#4462927>, @benshi001 wrote:

> In D153607#4462762 <https://reviews.llvm.org/D153607#4462762>, @zixuan-wu wrote:
>
>> need more case about bhz/bhsz?
>
> It is hard to add tests for
>
>   def : Pat<(brcond (i32 (setge GPR:$rs1, (i32 1))), bb:$imm16),
>             (BHZ32 GPR:$rs1, bb:$imm16)>;
>
> Since the original IR pattern
>
>   %icmp = icmp sge i32 %x, 1
>   br i1 %icmp, label %label1, label %label2
>
> is always transformed to an equivalent form by DAGCombiner
>
>   %icmp = icmp slt i32 %x, 1
>   br i1 %icmp, label %label2, label %label1
>
> before reaching to the CSKY backend.
>
> And `BHSZ32` has the same issue.
>
> I add these two `Pat`s for `BHSZ32` and `BHZ32`, just in case there is future changes in the DAGCombiner.

Try something like:

  C
  extern void on_false(void);
  void test_ge_1(int x) {
    if (!(x >= 1))
      on_false();
  }


Repository:
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