[PATCH] D154083: [AMDGPU] Rematerialize scalar loads
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 30 12:26:04 PDT 2023
arsenm added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:2354
+ MI->getOperand(0).setIsUndef(false);
+ MRI.setRegClass(DestReg, &AMDGPU::SGPR_256RegClass);
+
----------------
piotr wrote:
> arsenm wrote:
> > arsenm wrote:
> > > Can you go through getSubRegisterClass (possibly with getMatchingSuperRegClass and getSubClassWithSubReg) to avoid hardcoding this
> > Easier yet would be just use the result class from the instruction desc
> >
> > Also, is this safe from other users with a different class?
> Thanks - will rewrite this, but what exactly do you mean here by "safe from other users"?
I mean other instructions using the same virtual register that aren't expecting the class to change. You're mutating the existing register and not creating a new one with the new class
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https://reviews.llvm.org/D154083/new/
https://reviews.llvm.org/D154083
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