[PATCH] D154136: [RISCV] Add SEW to RISCVInversePseudoTable

[Michael Maitland via Phabricator via llvm-commits]

michaelmaitland updated this revision to Diff 536268.
michaelmaitland marked 4 inline comments as done.
michaelmaitland added a comment.

Represent SEW in bits<3>


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D154136/new/

https://reviews.llvm.org/D154136

Files:
  llvm/lib/Target/RISCV/MCA/RISCVCustomBehaviour.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D154136.536268.patch
Type: text/x-patch
Size: 10157 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230630/3f4b05af/attachment.bin>