[PATCH] D154225: [X86] Enable the VR512 register class when AVX512 is enabled

Nabeel Omer via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jun 30 07:51:34 PDT 2023


n-omer created this revision.
n-omer added reviewers: RKSimon, pengfei, craig.topper.
Herald added a subscriber: hiraditya.
Herald added a project: All.
n-omer requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

This fixes https://github.com/llvm/llvm-project/issues/63615 via `TargetLowering::getRegForInlineAsmConstraint()` but appears to cause regressions.

I'm currently dealing with the failing tests and crashes.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D154225

Files:
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/test/CodeGen/X86/avx512fp16-cvt.ll
  llvm/test/CodeGen/X86/pr59800.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D154225.536247.patch
Type: text/x-patch
Size: 12210 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230630/8cd8317e/attachment.bin>


More information about the llvm-commits mailing list