[PATCH] D154142: [llvm-mca][RISCV] Add RISCV-SEW instrument

[Min-Yih Hsu via Phabricator via llvm-commits]

myhsu added inline comments.


================
Comment at: llvm/lib/Target/RISCV/MCA/RISCVCustomBehaviour.h:46
+
+  RISCVSEWInstrument(StringRef Data) : Instrument(DESC_NAME, Data) {}
+
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maybe adding `explicit`?


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Comment at: llvm/test/tools/llvm-mca/RISCV/different-sew-instruments.s:8
+vdiv.vv v8, v8, v12
+vsetvli zero, a0, e64, m1, tu, mu
+# LLVM-MCA-RISCV-SEW E64
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is there any specific reason to test with the same LMUL here?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D154142/new/

https://reviews.llvm.org/D154142