[PATCH] D154124: [WebAssembly] Fix incorrect assertion in SIMD reduction codegen

Heejin Ahn via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jun 29 14:26:07 PDT 2023

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aheejin accepted this revision.
aheejin added a comment.
This revision is now accepted and ready to land.

Wow the codegen is indeed impressive... 😂


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D154124/new/

https://reviews.llvm.org/D154124

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